DS26C32ATM

DS26C32AT / DS26C32AM四路差动线路接收器 DS26C32AT/DS26C32AM Quad Differential Line Receiver

The is a CMOS quad differential Line Receiver designed to meet the RS-422, RS-423 and Federal Standards 1020 and 1030 for balanced and unbalanced digital data transmission, while retaining the low power characteristics of CMOS. The DS26C32A has an input sensitivity of 200mV over the common mode input voltage range of ±7V. The receiver features internal pull-up and pull-down resistors which prevent output oscillation on unused channels. The line receiver provides an enable and disable function common to all four receivers. It also features TRI-STATE outputs with 6mA source and sink capability.

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CMOS Design for low power

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±0.2V Sensitivity over input common mode voltage range

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19ns Typical propagation delays

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60mV Typical input hysteresis

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Inputs won"t load line when VCC = 0V

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Meets the requirements of EIA standard RS-422

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Tri-state outputs for connection to system buses

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Mil-Std-883C Compliant

This device has limited built-in ESD protection, leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.