STM8AL31E8ATAX

STMICROELECTRONICS  STM8AL31E8ATAX  微控制器, 8位, STM8, 16 MHz, 64 KB, 4 KB, 80 引脚, LQFP

The high-density STM8AL3xE8x ultra-low-power devices feature an enhanced STM8 CPU core providing increased processing power up to 16 MIPS at 16 MHz while maintaining the advantages of a CISC architecture with improved code density, a 24-bit linear addressing space and an optimized architecture for low-power operations.

The family includes an integrated debug module with a hardware interface SWIM which allows non-intrusive in-application debugging and ultrafast Flash programming.

All high-density STM8AL3xE8x microcontrollers feature embedded data EEPROM and low-power low-voltage single-supply program Flash memory.

The devices incorporate an extensive range of enhanced I/Os and peripherals, a 12-bit ADC, two DACs, two comparators, a real-time clock, AES, 8x40 or 4x44-segment LCD, four 16-bit timers, one 8-bit timer, as well as standard communication interfaces such as two SPIs, an I2C interface, and three USARTs. One 8x40 or 4x44-segment LCD is available on the STM8AL3LE8x devices. The modular design of the peripheral set allows the same peripherals to be found in different ST microcontroller families including 32-bit families. This makes any transition to a different family very easy, and simplified even more by the use of a common set of development tools.

**Key Features**

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AEC-Q100 grade 1 qualified

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Operating conditions

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Operating power supply range 1.8 V to 3.6 V down to 1.65 V at power down

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Temp. range: -40 to 85 or 125 °C

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Low-power features

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5 low-power modes: Wait, Low-power run 5.9 μA, Low-power wait 3 μA, Active-halt with full RTC 1.4 μA, Halt 400 nA

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Consumption: 200 μA/MHz+330 μA

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Fast wake up from Halt mode 4.7 μs

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Ultra-low leakage per I/0: 50 nA

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Advanced STM8 core

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Harvard architecture and 3-stage pipeline

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Max freq: 16 MHz, 16 CISC MIPS peak

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Up to 40 external interrupt sources

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Reset and supply management

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Low power, ultra safe BOR reset with 5 programmable thresholds

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Ultra-low-power POR/PDR

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Programmable voltage detector PVD

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Clock management

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32 kHz and 1-16 MHz crystal oscillators

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Internal 16 MHz factory-trimmed RC and 38 kHz low consumption RC

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Clock security system

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Low-power RTC

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BCD calendar with alarm interrupt,

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Digital calibration with +/- 0.5ppm accuracy

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Advanced anti-tamper detection

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DMA

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4 ch. for ADC, encryption hardware accelerator AES, DACs, SPIs, I2 C, USARTs, Timers, 1 ch. for memory-to-memory

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LCD: 8x40 or 4x44 w/ step-up converter

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12-bit ADC up to 1 Msps / 28 channels,

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Temp. sensor and internal ref. voltage

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Memories

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Up to 64 Kbytes of Flash with up to 2 Kbytes of data EEPROM with ECC and RWW

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Flexible write/read protection modes

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Up to 4 Kbytes of RAM

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2x12-bit DAC dual mode with output buffer

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2 ultra-low-power comparators

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1 with fixed threshold and 1 rail to rail

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Wakeup capability

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Timers

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Three 16-bit timers with 2 channels IC, OC, PWM, quadrature encoder

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One 16-bit advanced control timer with 3 channels, supporting motor control

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One 8-bit timer with 7-bit prescaler

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One window and one independent watchdog

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Beeper timer with 1, 2 or 4 kHz frequencies

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Communication interfaces

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Two synchronous serial interface SPI

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Fast I2 C 400 kHz SMBus and PMBus

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Three USARTs IrDA, LIN 1.3, LIN2.0

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Up to 67 I/Os, all mappable on interrupt vectors

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Fast on-chip programming and non-intrusive debugging with SWIM, Bootloader using USART

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96-bit unique ID