CPLD, FLASH, 72, 52 输入, VQFP, 64 引脚, 178.6 MHz
* Optimized for high-performance 3.3V systems * 5 ns pin-to-pin logic delays, with internal systemfrequency up to 208 MHz * Small footprint packages including VQFPs, TQFPsand CSPs Chip Scale Package * Pb-free available for all packages * Lower power operation * 5V tolerant I/O pins accept 5V, 3.3V, and 2.5Vsignals * 3.3V or 2.5V output capability * Advanced 0.35 micron feature size CMOSFastFLASH technology * Advanced system features * In-system programmable * Superior pin-locking and routability withFastCONNECT II switch matrix * Extra wide 54-input Function Blocks * Up to 90 product-terms per macrocell withindividual product-term allocation * Local clock inversion with three global and oneproduct-term clocks * Individual output enable per output pin with localinversion * Input hysteresis on all user and boundary-scan pininputs * Bus-hold circuitry on all user pin inputs * Supports hot-plugging capability * Full IEEE Std 1149.1 boundary-scan JTAGsupport on all devices * Four pin-compatible device densities * 36 to 288 macrocells, with 800 to 6400 usablegates * Fast concurrent programming * Slew rate control on individual outputs * Enhanced data security features * Excellent quality and reliability * 10,000 program/erase cycles endurance rating * 20 year data retention * Pin-compatible with 5V core XC9500 family in commonpackage footprints
型号 | 品牌 | 下载 |
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XC9572XL-5VQG64C | Xilinx 赛灵思 | 下载 |
XC9572XL-10PCG44C | Xilinx 赛灵思 | 下载 |
XC9536-15PCG44C | Xilinx 赛灵思 | 下载 |
XC9536-15VQG44C | Xilinx 赛灵思 | 下载 |
XC9536XL-10PCG44C | Xilinx 赛灵思 | 下载 |
XC9572-15PCG44C | Xilinx 赛灵思 | 下载 |
XC9572-15PCG84C | Xilinx 赛灵思 | 下载 |
XC95288XL-10TQG144 | Xilinx 赛灵思 | 下载 |
XC95144XL-10TQ144C | Xilinx 赛灵思 | 下载 |
XC95144XL-10TQ100I | Xilinx 赛灵思 | 下载 |
XC95144XL-10TQ144I | Xilinx 赛灵思 | 下载 |