具有三态输出的四路总线缓冲器闸
The ABT125 quadruple bus buffer gates feature independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable OE\ input is high.
These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down, which prevents driver conflict.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
<1 V at VCC = 5 V, TA = 25°C
| 型号 | 品牌 | 下载 |
|---|---|---|
| SN74ABT125 | TI 德州仪器 | 下载 |
| SN74CB3T3383DW | TI 德州仪器 | 下载 |
| SN74CBT16212ADLRG4 | TI 德州仪器 | 下载 |
| SN74CB3T3383DWR | TI 德州仪器 | 下载 |
| SN74CBTLV3383PW | TI 德州仪器 | 下载 |
| SN74CBT16212AZQLR | TI 德州仪器 | 下载 |
| SN74CBT3383DBQR | TI 德州仪器 | 下载 |
| SN74CB3T3383PW | TI 德州仪器 | 下载 |
| SN74CBTLV3383PWE4 | TI 德州仪器 | 下载 |
| SN74CBT3383DBR | TI 德州仪器 | 下载 |
| SN74CB3T3383PWR | TI 德州仪器 | 下载 |