NXP 74HCT257N 芯片, 74HCT CMOS逻辑器件
The is a 2-input Quad Multiplexer with 3-state output. This high-speed Si-gate CMOS device is pin compatible with low-power Schottky TTL LSTTL. It has four identical 2-input multiplexer with 3-state outputs, which select 4 bits of data from two sources and are controlled by a common data select input S. The data inputs from source 0 1I0 to 4I0 are selected when input S is low and the data inputs from source 1 1I1 to 4I1 are selected when S is high. Data appears at the outputs 1Y to 4Y in true non-inverting form from the selected inputs. It is the logic implementation of a 4-pole, 2-position switch, where the position of the switch is determined by the logic levels applied to S. The outputs are forced to a high-impedance OFF-state when OE\ is high.