M5M44265CTP-7

EDO （超页模式） 4194304 - BIT （ 262144 - WORD 16 - BIT）动态RAM EDO HYPER PAGE MODE 4194304-BIT 262144-WORD BY 16-BIT DYNAMIC RAM

DESCRIPTION

This is a family of 262144-word by 16-bit dynamic RAMs with Hyper Page mode fuction, fabricated with the high performance CMOS process, and is ideal for the buffer memory systems of personal computer graphics and HDD where high speed, low power dissipation, and low costs are essential.

The use of double-layer metalization process technology and a single-transistor dynamic storage stacked capacitor cell provide high circuit density at reduced costs. Multiplexed address inputs permit both a reduction in pins and an increase in system densities. Self or extended refresh current is low enough for battery back-up application.

This device has 2CAS and 1W terminals with a refresh cycle of 512 cycles every 8.2ms.

FEATURES

• Standard 40pin SOJ, 44 pin TSOP II

• Single 5V±10% supply

• Low stand-by power dissipation

   CMOS Input level--------------------------5.5mW Max

   CMOS Input level--------------------------550µW Max

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• Operating power dissipation

   M5M44265Cxx-5,-5S--------------------------688mW Max

   M5M44265Cxx-6,-6S--------------------------605mW Max

   M5M44265Cxx-7,-7S--------------------------523mW Max

• Self refresh capability

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   Self refresh current--------------------------150µA Max

• Extended refresh capability

   Extended refresh current--------------------------150µA Max

• Hyper-page mode 512-column random access, Read-modify write, RAS-only refresh, CAS before RAS refresh, Hidden refresh capabilities.

• Early-write mode, OE and W to control output buffer impedance

• 512 refresh cycles every 8.2ms A0~A8

• 512 refresh cycles every 128ms A0~A8

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• Byte or word control for Read/Write operation 2CAS, 1W type

* : Applicable to self refresh version M5M44265CJ,TP-5S,-6S,-7S : option only

APPLICATION

  Microcomputer memory, Refresh memory for CRT, Frame Buffer memory for CRT