N沟道150 -V ( D- S) 175℃ MOSFET N-Channel 150-V D-S 175∑C MOSFET
DESCRIPTION
The attached spice model describes the typical electrical characteristics of the n-channel vertical DMOS. The subcircuit model is extracted and optimized over the −55 to 125°C temperature ranges under the pulsed 0 to 10V gate drive. The saturated output impedance is best fit at the gate bias near the threshold voltage.
A novel gate-to-drain feedback capacitance network is used to model the gate charge characteristics while avoiding convergence difficulties of the switched Cgd model. All model parameter values are optimized to provide a best fit to the measured electrical data and are not intended as an exact physical interpretation of the device.
CHARACTERISTICS
• N- and P-Channel Vertical DMOS
• Macro Model Subcircuit Model
• Level 3 MOS
• Apply for both Linear and Switching Application
• Accurate over the −55 to 125°C Temperature Range
• Model the Gate Charge, Transient, and Diode Reverse Recovery Characteristics
| 型号 | 品牌 | 下载 |
|---|---|---|
| 72425 | Vishay Semiconductor 威世 | 下载 |
| 72421L25J8 | Integrated Device Technology 艾迪悌 | 下载 |
| 72421L15PF8 | Integrated Device Technology 艾迪悌 | 下载 |
| 72421L10PF8 | Integrated Device Technology 艾迪悌 | 下载 |
| 72421L25PF8 | Integrated Device Technology 艾迪悌 | 下载 |
| 72421L25PFI8 | Integrated Device Technology 艾迪悌 | 下载 |
| 72421L15JI8 | Integrated Device Technology 艾迪悌 | 下载 |
| 72421L10J8 | Integrated Device Technology 艾迪悌 | 下载 |
| 72421L25PF | Integrated Device Technology 艾迪悌 | 下载 |
| 72421L15PF | Integrated Device Technology 艾迪悌 | 下载 |
| 72421L10PF | Integrated Device Technology 艾迪悌 | 下载 |