TPS3813K33QDBVRQ1

TEXAS INSTRUMENTS  TPS3813K33QDBVRQ1  监控器, 低电平有效, 漏极开路复位, 2V-6V输入, SOT-23-6

The is a Supervisory Circuit with active-low open-drain output. The supervisory circuit provides circuit initialization and timing supervision, primarily for DSPs and processor-based systems. During power on, the /RESET pin is asserted when the supply voltage VDD becomes higher than 1.1V. Thereafter, the supervisory circuit monitors VDD and keeps the /RESET pin active as long as VDD remains below the threshold voltage VIT. An internal timer delays the return of the output to the inactive high state to ensure proper system reset. The delay time td of 25ms typical, begins after VDD has risen above the threshold voltage VIT. When the supply voltage drops below the threshold voltage VIT, the output becomes active low again. No external components are required. It has a fixed-sense threshold voltage VIT set by an internal voltage divider.

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Window-watchdog with programmable delay and window ratio

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power-ON reset generator

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9µA Typical supply current

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Green product and no Sb/Br