BR34L02FV-W

DDR1 / DDR2为内存模块）内存SPD DDR1/DDR2 For memory module SPD Memory

The is a2kbit EEPROM memory with write-protect function having independent rewrite inhibit area, developed for a DIMM that uses synchronous DRAM memory, and a RIMM that uses RAMBUS DRAM memory. This is a memoryIC that reads ID in order for the Plug & Play feature to operate.

Features

1 256k registers ×8 bits serial architecture

2 Single power supply1.8V to 5.5V

3 Two wire serial interface

4 Page Write Function 16byte

5 Write Protect Mode

Write protect 1 One time Rom  : 00h to 7Fh

Write protect 2 Hard wire WP PIN  : 00h to FFh

6 Low Power consumption

Write 5V  : 1.2mATyp.

Read 5V  : 0.2mATyp.

Standby5V  : 0.1µA Typ.

7DATA security

Write protect feature WP pin

Inhibit to WRITE at low VCC

8 Small package - - - - - - SSOP-B8 pin

9 High reliability fine pattern CMOS technology

10 Endurance : 1,000,000 erase/write cycles

11 Dataretention : 40years

12 Filtered inputs in SCL•SDA for noise suppression

13 Initial data FFh in all address