NXP P82B96TD,118 芯片, 总线缓冲器, 2路输入, SOIC-8
The is a dual bi-directional Bus Buffer creates a non-latching, bi-directional, logic interface between the normal IC-bus and a range of other bus configurations. It can interface IC-bus logic signals to similar buses having different voltage and current levels. It achieves this interface without any restrictions on the normal IC-bus protocols or clock speed. The IC adds minimal loading to the IC-bus node and loadings of the new bus or remote IC-bus nodes are not transmitted or transformed to the local node. Restrictions on the number of IC-bus devices in a system or the physical separation between them is virtually eliminated. Transmitting SDA and SCL signals via balanced transmission lines or with galvanic isolation opto-coupling is simple because separate directional Tx and Rx signals are provided. The Tx and Rx signals may be directly connected without causing latching, to provide an alternative bi-directional signal line with IC-bus properties.