OHCI-Lynx 基于 PCI 的 IEEE 1394 主机控制器
The Texas Instruments device is a PCI-to-1394 host controller compliant with the _PCI Local Bus_ _Specification, PCI Bus Power Management Interface Specification_, IEEE Std 1394-1995, and _1394 Open Host_ _Controller Interface Specification_. The chip provides the IEEE 1394 link function and is compatible with 100M bits/s, 200M bits/s, and 400M bits/s serial bus data rates.
As required by the _1394 Open Host Controller Interface Specification_ OHCI and IEEE Std 1394a-2000, internal control registers are memory-mapped and nonprefetchable. The PCI configuration header is accessed through configuration cycles specified by PCI and provides plug-and-play PnP compatibility. Furthermore, the TSB12LV26 device is compliant with the _PCI Bus Power Management Interface Specification_, per the _PC 99 Design Guide_ requirements. TSB12LV26 device supports the D0, D2, and D3 power states.
The TSB12LV26 design provides PCI bus master bursting and is capable of transferring a cacheline of data at 132M bytes/s after connection to the memory controller. Since PCI latency can be large, deep FIFOs are provided to buffer 1394 data.
The TSB12LV26 device provides physical write posting buffers and a highly-tuned physical data path for SBP-2 performance. The TSB12LV26 device also provides multiple isochronous contexts, multiple cacheline burst transfers, advanced internal arbitration, and bus-holding buffers on the PHY/link interface.
An advanced CMOS process achieves low power consumption and allows the TSB12LV26 device to operate at PCI clock rates up to 33 MHz.
OHCI-Lynx and are trademarks of Texas Instruments.
型号 | 品牌 | 下载 |
---|---|---|
TSB12LV26 | TI 德州仪器 | 下载 |
TSB15LV01PFC | TI 德州仪器 | 下载 |
TSB15LV01PFCG4 | TI 德州仪器 | 下载 |
TSB15LV01IPFC | TI 德州仪器 | 下载 |
TSB14C01APMR | TI 德州仪器 | 下载 |
TSB12LV26PZT | TI 德州仪器 | 下载 |
TSB12LV26PZTG4 | TI 德州仪器 | 下载 |
TSB12LV32PZ | TI 德州仪器 | 下载 |
TSB14AA1PFBG4 | TI 德州仪器 | 下载 |
TSB14AA1APFBG4 | TI 德州仪器 | 下载 |
TSB14AA1APFB | TI 德州仪器 | 下载 |