CD74AC175M96 编带
This positive-edge-triggered D-type flip-flop has a direct clear CLR\ input. The CD74AC175 features complementary outputs from each flip-flop.
Information at the data D inputs meeting the setup time requirements is transferred to the outputs on the positive-going edge of the clock CLK pulse. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going edge of CLK. When CLK is at either the high or low level, the D input has no effect at the output.
型号 | 品牌 | 下载 |
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