对比图
型号 GAL18V10B-15LP GAL18V10B-20LP GAL18V10-15LP
描述 SPLD GAL Family 10 Macro Cells 66.7MHz 5V 20Pin PDIPSPLD GAL Family 10 Macro Cells 62.5MHz 5V 20Pin PDIPSPLD GAL Family 10 Macro Cells 66.7MHz EECMOS Technology 5V 20Pin PDIP
数据手册 ---
制造商 Lattice Semiconductor (莱迪思) Lattice Semiconductor (莱迪思) Lattice Semiconductor (莱迪思)
分类 CPLD芯片CPLD芯片
安装方式 Through Hole Through Hole Through Hole
引脚数 20 20 -
封装 DIP-20 DIP-20 PDIP
工作温度(Max) 75 ℃ 75 ℃ -
工作温度(Min) 0 ℃ 0 ℃ -
频率 66.7 MHz - -
供电电流 115 mA - -
电源电压 5 V - 5 V
高度 - 3.3 mm -
封装 DIP-20 DIP-20 PDIP
工作温度 0℃ ~ 75℃ (TA) 0℃ ~ 75℃ (TA) -
产品生命周期 Obsolete Obsolete Obsolete
包装方式 Tube Tube -
RoHS标准 Non-Compliant Non-Compliant -
含铅标准 Contains Lead Contains Lead -
ECCN代码 EAR99 - -