具有清零和预置端的双路正边沿触发式 D 型触发器 14-SO -40 to 85
This device contains two independent positive-edge-triggered D-type flip-flops. A low level at the preset or clear input sets or resets the outputs regardless of the levels of the other inputs. When and are inactive high, data at the data D input meeting the setup-time requirements are transferred to the outputs on the low-to-high transition of the clock CLK pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs.
The 74ACT11074 is characterized for operation from -40°C to 85°C.
型号 | 品牌 | 下载 |
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74ACT11074NSR | TI 德州仪器 | 下载 |
74ACT16244DL | TI 德州仪器 | 下载 |
74ACT244MTC | Fairchild 飞兆/仙童 | 下载 |
74ACT244SC | Fairchild 飞兆/仙童 | 下载 |
74ACT244SCX | Fairchild 飞兆/仙童 | 下载 |
74ACT541MTC | Fairchild 飞兆/仙童 | 下载 |
74AC244SC | Fairchild 飞兆/仙童 | 下载 |
74ACT541SC | Fairchild 飞兆/仙童 | 下载 |
74ACT11244DW | TI 德州仪器 | 下载 |
74ACT245SCX | Fairchild 飞兆/仙童 | 下载 |
74AC245SCX | Fairchild 飞兆/仙童 | 下载 |