CDC208DWRG4数据手册PDF_CDC208DWRG4中文资料-锐单商城

CDC208DWRG4概述

双1号线到4线时钟驱动器与3态输出 DUAL 1-LINE TO 4-LINE CLOCK DRIVER WITH 3-STATE OUTPUTS

Clock Fanout Buffer Distribution IC 1:4 60MHz 20-SOIC 0.295", 7.50mm Width

得捷:
IC CLK BUFFER 1:4 60MHZ 20SOIC

艾睿:
Clock Fanout Buffer 8-OUT 2-IN 1:4 20-Pin SOIC T/R

安富利:
Clock Fanout Buffer 8-OUT 20-Pin SOIC T/R

Chip1Stop:
Clock Fanout Buffer 8-OUT 20-Pin SOIC T/R

Verical:
Clock Fanout Buffer 8-OUT 2-IN 1:4 20-Pin SOIC T/R

CDC208DWRG4数据文档