GS88036CGT-200I

SRAM Chip Sync Quad 2.5V/3.3V 9M-Bit 256K x 36 6.5ns/3ns 100Pin TQFP

* FT pin for user-configurable flow through or pipeline operation * Single Cycle Deselect SCD operation * 2.5 V or 3.3 V +10%/–10% core power supply * 2.5 V or 3.3 V I/O supply * LBO pin for Linear or Interleaved Burst mode * Internal input resistors on mode pins allow floating mode pins * Default to Interleaved Pipeline mode * Byte Write BW and/or Global Write GW operation * Internal self-timed write cycle * Automatic power-down for portable applications * JEDEC-standard 100-lead TQFP package * RoHS-compliant 100-lead TQFP package available