CD4522BE

TEXAS INSTRUMENTS  CD4522BE  芯片, 逻辑芯片 - 计数器

The is a CMOS programmable BCD Divide-By-N Counter has a decoded "0" state output for divide-by-N applications. In single stage operation the "0" output is tied to the Preset Enable input. The Cascade Feedback allows multiple stage divide-by-N operation without the need for external gating. A high on the Clock Inhibit disables the pulse-counting function. A high on the Master Reset asynchronously resets the divide-by-N operation. The output is presented in BCD format.

.

Internally synchronous for high internal and external speeds

.

Logic edge-clocked design

.

100% Tested for quiescent current at 20V

.

Standard symmetrical output characteristics