Uart0_F450.cpp
#include "UART0_F450.hpp" #include "main.h" //#include "usart.h" //#include "dma.h" //extern UART_HandleTypeDef huart1; //extern DMA_HandleTypeDef hdma_usart1_rx; //extern DMA_HandleTypeDef hdma_usart1_tx; #define USART0_DATA_ADDRESS ((uint32_t)&USART_DATA(USART0)) void UART0_F450::Init(uint32_t baud) { /* initialize clock */ rcu_periph_clock_enable(RCU_DMA1); rcu_periph_clock_enable(RCU_USART0); rcu_periph_clock_enable(RCU_GPIOA); /* initialize port */ gpio_af_set(GPIOA, GPIO_AF_7, GPIO_PIN_9|GPIO_PIN_10); gpio_mode_set(GPIOA, GPIO_MODE_AF, GPIO_PUPD_PULLUP,GPIO_PIN_9|GPIO_PIN_10); gpio_output_options_set(GPIOA, GPIO_OTYPE_PP, GPIO_OSPEED_50MHZ,GPIO_PIN_9|GPIO_PIN_10); /* USART configure */ usart_deinit(USART0); usart_oversample_config(USART0, USART_OVSMOD_8); usart_baudrate_set(USART0,baud); //波特率 usart_parity_config(USART0, USART_PM_NONE); ///校验位：NONE usart_word_length_set(USART0, USART_WL_8BIT); //数据位：8 usart_stop_bit_set(USART0, USART_STB_1BIT); //停止位:1 usart_receive_config(USART0, USART_RECEIVE_ENABLE); usart_transmit_config(USART0, USART_TRANSMIT_ENABLE); /* enable USART0 IDLEIE interrupt */ usart_interrupt_enable(USART0, USART_INT_IDLE); /* USART interrupt configuration */ nvic_irq_enable(USART0_IRQn, 1, 1); usart_enable(USART0); /* USART DMA enable*/ usart_dma_receive_config(USART0, USART_DENR_ENABLE); usart_dma_transmit_config(USART0, USART_DENT_ENABLE); /*configure DMA0 interrupt*/ nvic_irq_enable(DMA1_Channel7_IRQn, 0, 0); nvic_irq_enable(DMA1_Channel2_IRQn, 0, 1); dma_single_data_parameter_struct dma_init_struct; /* deinitialize DMA1 channel7(USART0 tx) */ dma_single_data_para_struct_init(&dma_init_struct); dma_deinit(DMA1, DMA_CH7); dma_init_struct.direction = DMA_MEMORY_TO_PERIPH; dma_init_struct.memory0_addr = (uint32_t)0; dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE; dma_init_struct.periph_memory_width = DMA_PERIPH_WIDTH_8BIT; dma_init_struct.number = 0; dma_init_struct.periph_addr = USART0_DATA_ADDRESS; dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE; dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH; dma_single_data_mode_init(DMA1, DMA_CH7, &dma_init_struct); /* configure DMA mode */ dma_circulation_disable(DMA1, DMA_CH7); dma_channel_subperipheral_select(DMA1, DMA_CH7, DMA_SUBPERI4); /* enable DMA1 channel7 transfer complete interrupt */ dma_interrupt_enable(DMA1, DMA_CH7, DMA_CHXCTL_FTFIE); /* enable DMA1 channel7 */ dma_channel_enable(DMA1, DMA_CH7); /* deinitialize DMA1 channel2 (USART0 rx) */ dma_deinit(DMA1, DMA_CH2); dma_init_struct.direction = DMA_PERIPH_TO_MEMORY; dma_init_struct.memory0_addr = (uint32_t)RxBuf; dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE; dma_init_struct.number = 128; dma_init_struct.periph_addr = (uint32_t)&USART_DATA(USART0); dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE; dma_init_struct.periph_memory_width = DMA_PERIPH_WIDTH_8BIT; dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH; dma_single_data_mode_init(DMA1, DMA_CH2, &dma_init_struct); /* configure DMA mode */ dma_circulation_disable(DMA1, DMA_CH2); dma_channel_subperipheral_select(DMA1, DMA_CH2, DMA_SUBPERI4); /* enable DMA1 channel2 transfer complete interrupt */ dma_interrupt_enable(DMA1, DMA_CH2, DMA_CHXCTL_FTFIE); /* enable DMA1 channel2 */ dma_channel_enable(DMA1, DMA_CH2); } uint8_t UART0_F450::Write(uint8_t *buf, uint16_t len) { dma_single_data_parameter_struct dma_init_struct; dma_single_data_para_struct_init(&dma_init_struct); dma_deinit(DMA1, DMA_CH7); dma_init_struct.direction = DMA_MEMORY_TO_PERIPH; dma_init_struct.memory0_addr = (uint32_t)buf; dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE; dma_init_struct.periph_memory_width = DMA_PERIPH_WIDTH_8BIT; dma_init_struct.number = len; dma_init_struct.periph_addr = USART0_DATA_ADDRESS; dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE; dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH; dma_single_data_mode_init(DMA1, DMA_CH7, &dma_init_struct); dma_channel_subperipheral_select(DMA1, DMA_CH7, DMA_SUBPERI4); dma_channel_enable(DMA1, DMA_CH7); while(!dma_flag_get(DMA1,DMA_CH7,DMA_FLAG_FTF)); } uint16_t UART0_F450::GetRxLenth(void) { return 128 - dma_transfer_number_get(DMA1, DMA_CH2); } void UART0_F450::ReadResume(void) { dma_single_data_parameter_struct dma_init_struct; /* deinitialize DMA channel2 (USART0 rx) */ dma_deinit(DMA1, DMA_CH2); dma_init_struct.direction = DMA_PERIPH_TO_MEMORY; dma_init_struct.memory0_addr = (uint32_t)RxBuf; dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE; dma_init_struct.number = 128; dma_init_struct.periph_addr = (uint32_t)&USART_DATA(USART0); dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE; dma_init_struct.periph_mmory_width = DMA_PERIPH_WIDTH_8BIT;
dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
dma_single_data_mode_init(DMA1, DMA_CH2, &dma_init_struct);
/* configure DMA mode */
dma_circulation_disable(DMA1, DMA_CH2);
dma_channel_subperipheral_select(DMA1, DMA_CH2, DMA_SUBPERI4);
/* enable DMA channel2 */
dma_channel_enable(DMA1, DMA_CH2);
}
void UART0_F450::Read(uint8_t *buf, uint16_t *len)
{
*len = 128 - dma_transfer_number_get(DMA1, DMA_CH2);
if(*len > 0)
{
for(int i = 0; i < *len; i++)
{
buf[i] = RxBuf[i];
}
dma_single_data_parameter_struct dma_init_struct;
/* deinitialize DMA channel2 (USART0 rx) */
dma_deinit(DMA1, DMA_CH2);
dma_init_struct.direction = DMA_PERIPH_TO_MEMORY;
dma_init_struct.memory0_addr = (uint32_t)RxBuf;
dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
dma_init_struct.number = 128;
dma_init_struct.periph_addr = (uint32_t)&USART_DATA(USART0);
dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
dma_init_struct.periph_memory_width = DMA_PERIPH_WIDTH_8BIT;
dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
dma_single_data_mode_init(DMA1, DMA_CH2, &dma_init_struct);
/* configure DMA mode */
dma_circulation_disable(DMA1, DMA_CH2);
dma_channel_subperipheral_select(DMA1, DMA_CH2, DMA_SUBPERI4);
/* enable DMA channel2 */
dma_channel_enable(DMA1, DMA_CH2);
}
}
void UART0_F450::Write(uint16_t len)
{
dma_single_data_parameter_struct dma_init_struct;
dma_single_data_para_struct_init(&dma_init_struct);
dma_deinit(DMA1, DMA_CH7);
dma_init_struct.direction = DMA_MEMORY_TO_PERIPH;
dma_init_struct.memory0_addr = (uint32_t)TxBuf;
dma_init_struct.memory_inc = DMA_MEMORY_INCREASE_ENABLE;
dma_init_struct.periph_memory_width = DMA_PERIPH_WIDTH_8BIT;
dma_init_struct.number = len;
dma_init_struct.periph_addr = USART0_DATA_ADDRESS;
dma_init_struct.periph_inc = DMA_PERIPH_INCREASE_DISABLE;
dma_init_struct.priority = DMA_PRIORITY_ULTRA_HIGH;
dma_single_data_mode_init(DMA1, DMA_CH7, &dma_init_struct);
dma_channel_enable(DMA1, DMA_CH7);
while(RESET == dma_flag_get(DMA1, DMA_CH7, DMA_FLAG_FTF));
}
int16_t UART0_F450::Read(void)
{
return 1;
}
UART0_F450.hpp
#pragma once
#include <stdint.h>
#include "Bsp/bsp.hpp"
class UART0_F450: public UART
{
public:
UART0_F450(){}
void Init(uint32_t baud = 115200);
uint8_t Write(uint8_t *buf, uint16_t len);
void Read(uint8_t *buf, uint16_t *len);
void Write(uint16_t len);
void ReadResume(void);
int16_t Read(void);
uint16_t GetRxLenth(void);
};
main.h
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : main.h
* @brief : Header for main.c file.
* This file contains the common defines of the application.
******************************************************************************
* @attention
*
* Copyright (c) 2022 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __MAIN_H
#define __MAIN_H
//#include "bsp.hpp"
//#include "os.hpp"
//extern BSP *gbsp;
//extern OS *gos;
#ifdef __cplusplus
extern "C" {
#endif
/* Includes ------------------------------------------------------------------*/
#include "gd32f4xx.h"
#include "gd32f4xx_gpio.h"
#include "gd32f4xx.h"
#include "gd32f4xx_dma.h"
#include "system_gd32f4xx.h"
#include "gd32f4xx_rcu.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Exported types ------------------------------------------------------------*/
/* USER CODE BEGIN ET */
/* USER CODE END ET */
/* Exported constants --------------------------------------------------------*/
/* USER CODE BEGIN EC */
/* USER CODE END EC */
/* Exported macro ------------------------------------------------------------*/
/* USER CODE BEGIN EM */
/* USER CODE END EM */
/* Exported functions prototypes ---------------------------------------------*/
//void Error_Handler(void);
/* USER CODE BEGIN EFP */
/* USER CODE END EFP */
/* Private defines -----------------------------------------------------------*/
/* USER CODE BEGIN Private defines */
/* USER CODE END Private defines */
#ifdef __cplusplus
}
#endif
#endif /* __MAIN_H */